pinctrl: exynos: Use one IRQ domain per pin bank

Instead of registering one IRQ domain for all pin banks of a pin
controller, this patch implements registration of per-bank domains.

At a cost of a little memory overhead (~2.5KiB for all GPIO interrupts
of Exynos4x12) it simplifies driver code and device tree sources,
because GPIO interrupts can be now specified per banks.

Example:
	device {
		/* ... */
		interrupt-parent = <&gpa1>;
		interrupts = <3 0>;
		/* ... */
	};

Signed-off-by: Tomasz Figa <[email protected]>
Reviewed-by: Kyungmin Park <[email protected]>
Acked-by: Thomas Abraham <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>

0 files changed, 0 insertions, 0 deletions