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| author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2024-04-24 04:39:29 +0300 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2024-04-27 13:14:56 -0500 |
| commit | e801038a02ce1e8c652a0b668dd233a4ee48aeb7 (patch) | |
| tree | 8c1ea34001724798ce6861d52c099e9413e6ffec /lib/crypto/mpi/mpi-mod.c | |
| parent | f3574392290d37647821d40f89136177b28e5f34 (diff) | |
clk: qcom: dispcc-sm8450: fix DisplayPort clocks
On SM8450 DisplayPort link clocks use frequency tables inherited from
the vendor kernel, it is not applicable in the upstream kernel. Drop
frequency tables and use clk_byte2_ops for those clocks.
This fixes frequency selection in the OPP core (which otherwise attempts
to use invalid 810 KHz as DP link rate), also fixing the following
message:
msm-dp-display ae90000.displayport-controller: _opp_config_clk_single: failed to set clock rate: -22
Fixes: 16fb89f92ec4 ("clk: qcom: Add support for Display Clock Controller on SM8450")
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240424-dispcc-dp-clocks-v2-1-b44038f3fa96@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'lib/crypto/mpi/mpi-mod.c')
0 files changed, 0 insertions, 0 deletions