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author | AngeloGioacchino Del Regno <[email protected]> | 2024-11-04 12:49:34 +0100 |
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committer | Krzysztof Wilczyński <[email protected]> | 2024-11-04 16:52:46 +0000 |
commit | ade7da14954a5d1003ceb316a230189c445ba357 (patch) | |
tree | c6629e4a239fc604f36f7aa8660048a1794405d4 /lib/crypto/mpi/mpi-internal.h | |
parent | 9852d85ec9d492ebef56dc5f229416c925758edc (diff) |
PCI: mediatek-gen3: Add support for setting max-link-speed limit
Add support for respecting the max-link-speed devicetree property,
forcing a maximum speed (Gen) for a PCI-Express port.
Since the MediaTek PCIe Gen3 controllers also expose the maximum
supported link speed in the PCIE_BASE_CFG register, if property
max-link-speed is specified in devicetree, validate it against the
controller capabilities and proceed setting the limitations only
if the wanted Gen is lower than the maximum one that is supported
by the controller itself (otherwise it makes no sense!).
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
[kwilczynski: change dev_dbg() to dev_info() and update message wording]
Signed-off-by: Krzysztof Wilczyński <[email protected]>
Reviewed-by: Fei Shao <[email protected]>
Reviewed-by: Manivannan Sadhasivam <[email protected]>
Diffstat (limited to 'lib/crypto/mpi/mpi-internal.h')
0 files changed, 0 insertions, 0 deletions