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| author | Herve Codina <herve.codina@bootlin.com> | 2024-08-08 09:11:23 +0200 |
|---|---|---|
| committer | Christophe Leroy <christophe.leroy@csgroup.eu> | 2024-09-03 07:49:20 +0200 |
| commit | 8f55d06b4c49a8bf1a911bce89b6ee9460b8b052 (patch) | |
| tree | a108ba350854ca588b2807c7f0cb0aaef7539f41 /lib/crypto/mpi/mpi-internal.h | |
| parent | 278d799caa2e89fcb0a1b729954345eb3576b6ec (diff) | |
soc: fsl: cpm1: qmc: Rename SCC_GSMRL_MODE_QMC
Current code handles CPM1 version of QMC. Even if GSMRL is specific to
the CPM1 version, the exact same purpose and format register (GUMRL) is
present in the QUICC Engine (QE) version of QMC. Compared to the QE
version, the values defined for the mode bitfield are different and the
0x0A value defined for the QMC mode is CPM1 specific.
In order to prepare the support for the QE version, rename this bitfield
value to clearly identify it as CPM1 specific.
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Link: https://lore.kernel.org/r/20240808071132.149251-31-herve.codina@bootlin.com
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Diffstat (limited to 'lib/crypto/mpi/mpi-internal.h')
0 files changed, 0 insertions, 0 deletions