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| author | Ranjan Kumar <ranjan.kumar@broadcom.com> | 2023-03-31 17:53:17 +0530 |
|---|---|---|
| committer | Martin K. Petersen <martin.petersen@oracle.com> | 2023-04-02 21:22:28 -0400 |
| commit | a3d27dfdcfc27ac3f46de5391bb6d24f04af7941 (patch) | |
| tree | 072e0991f9ec5b0161098f5062660ecc75be4982 /lib/crypto/mpi/mpi-add.c | |
| parent | 86eb94bf8006a85738f0ccf49e3ce894e03922a6 (diff) | |
scsi: mpi3mr: Handle soft reset in progress fault code (0xF002)
The driver is exiting from the fault watchdog thread if it sees the 0xF002
(Soft reset in progress) fault code.
If the driver initiates the soft reset, then the driver restarts the
watchdog at the end of the soft reset completion. However, if the soft
reset is initiated by the firmware asynchronously, then the driver will
never restart the watchdog and never re-initialize the controller after the
asynchronous soft reset completion.
Signed-off-by: Ranjan Kumar <ranjan.kumar@broadcom.com>
Link: https://lore.kernel.org/r/20230331122317.11391-1-ranjan.kumar@broadcom.com
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'lib/crypto/mpi/mpi-add.c')
0 files changed, 0 insertions, 0 deletions