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authorVandita Kulkarni <[email protected]>2019-03-25 16:56:41 +0530
committerRodrigo Vivi <[email protected]>2019-04-10 09:06:29 -0700
commit20eea462bf2fbff3a4be375cc8424a544235a432 (patch)
treeeb81062e41a44a96e8bec44f13032c4a53c71c5d /lib/clz_tab.c
parentbef42cb2029c0ec8cd8c9e0545589d81913dec4e (diff)
drm/i915/icl: Ungate ddi clocks before IO enable
IO enable sequencing needs ddi clocks enabled. These clocks will be gated at a later point in the enable sequence. v2: Fix the commit header (Uma) v3: Remove the redundant read (Ville) Fixes: 949fc52af19e ("drm/i915/icl: add pll mapping for DSI") Signed-off-by: Vandita Kulkarni <[email protected]> Reviewed-by: Uma Shankar <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit c5b81a325263a891d5811aabe938c87e03db4c37) Signed-off-by: Rodrigo Vivi <[email protected]>
Diffstat (limited to 'lib/clz_tab.c')
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