diff options
| author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2022-06-22 19:17:23 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-07-05 09:20:34 +0200 |
| commit | 95d48d270305ad2ce4e6e8d84a9fb6ea49d6f8aa (patch) | |
| tree | fb3a85cd4c470c1a9ee96d12ba63693b54a3c12c /lib/bch.c | |
| parent | ce05f30dc3a04ca32f91f9fd2a3de7e0b52b0417 (diff) | |
clk: renesas: r9a07g043: Add support for RZ/Five SoC
Renesas RZ/Five SoC has almost the same clock structure compared to the
Renesas RZ/G2UL SoC, re-use the r9a07g043-cpg.c file to add support for
RZ/Five SoC.
This patch splits up the clocks and reset arrays for RZ/G2UL and RZ/Five
SoC using #ifdef CONFIG_ARM64 and #ifdef CONFIG_RISCV checks.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220622181723.13033-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'lib/bch.c')
0 files changed, 0 insertions, 0 deletions