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author | Jakub Kicinski <[email protected]> | 2023-04-17 08:28:05 -0700 |
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committer | Jakub Kicinski <[email protected]> | 2023-04-19 11:28:15 -0700 |
commit | 8e4c62c7d980eaf0f64c1c0ef0c80f5685af0fb6 (patch) | |
tree | 253e6b917ff666b2af82bfbbd12b4ba35d6e1604 /kernel/gcov/gcc_base.c | |
parent | 4e195166624851d1da1a4e42110e66ee4faca4a3 (diff) |
page_pool: add DMA_ATTR_WEAK_ORDERING on all mappings
Commit c519fe9a4f0d ("bnxt: add dma mapping attributes") added
DMA_ATTR_WEAK_ORDERING to DMA attrs on bnxt. It has since spread
to a few more drivers (possibly as a copy'n'paste).
DMA_ATTR_WEAK_ORDERING only seems to matter on Sparc and PowerPC/cell,
the rarity of these platforms is likely why we never bothered adding
the attribute in the page pool, even though it should be safe to add.
To make the page pool migration in drivers which set this flag less
of a risk (of regressing the precious sparc database workloads or
whatever needed this) let's add DMA_ATTR_WEAK_ORDERING on all
page pool DMA mappings.
We could make this a driver opt-in but frankly I don't think it's
worth complicating the API. I can't think of a reason why device
accesses to packet memory would have to be ordered.
Acked-by: Ilias Apalodimas <[email protected]>
Acked-by: Somnath Kotur <[email protected]>
Reviewed-by: Alexander Lobakin <[email protected]>
Acked-by: Jesper Dangaard Brouer <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Jakub Kicinski <[email protected]>
Diffstat (limited to 'kernel/gcov/gcc_base.c')
0 files changed, 0 insertions, 0 deletions