diff options
author | Krishna Yarlagadda <kyarlagadda@nvidia.com> | 2019-09-04 10:13:01 +0530 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-09-05 10:00:04 +0200 |
commit | 222dcdff3405a31803aecd3bf66f62d46b8bda98 (patch) | |
tree | 65f773829c812d6e61c59301e17038572a173353 /init | |
parent | c9fd37f926fc57c2788504da429521227ab5a024 (diff) |
serial: tegra: check for FIFO mode enabled status
Chips prior to Tegra186 needed delay of 3 UART clock cycles to avoid
data loss. This issue is fixed in Tegra186 and a new flag is added to
check if FIFO mode is enabled. chip data updated to check if this flag
is available for a chip. Tegra186 has new compatible to enable this
flag.
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Link: https://lore.kernel.org/r/1567572187-29820-7-git-send-email-kyarlagadda@nvidia.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'init')
0 files changed, 0 insertions, 0 deletions