diff options
| author | Vinod Koul <[email protected]> | 2021-02-10 21:46:49 +0530 |
|---|---|---|
| committer | Stephen Boyd <[email protected]> | 2021-02-14 12:56:55 -0800 |
| commit | 3fade948fbb3ccd30f6b06c474d0d084dffecb64 (patch) | |
| tree | bcfe344a10dedaedd9cac3914f8cd01a99584818 /include | |
| parent | e16831bf402c4db4a0b3c4921223ff68cdb5d0a0 (diff) | |
clk: qcom: gcc-sm8350: add gdsc
Add the GDSC found in GCC for SM8350 SoC
Signed-off-by: Vinod Koul <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/clock/qcom,gcc-sm8350.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/qcom,gcc-sm8350.h b/include/dt-bindings/clock/qcom,gcc-sm8350.h index 1331da65f669..f6be3da5f781 100644 --- a/include/dt-bindings/clock/qcom,gcc-sm8350.h +++ b/include/dt-bindings/clock/qcom,gcc-sm8350.h @@ -251,4 +251,16 @@ #define GCC_VIDEO_AXI1_CLK_ARES 36 #define GCC_VIDEO_BCR 37 +/* GCC power domains */ +#define PCIE_0_GDSC 0 +#define PCIE_1_GDSC 1 +#define UFS_CARD_GDSC 2 +#define UFS_PHY_GDSC 3 +#define USB30_PRIM_GDSC 4 +#define USB30_SEC_GDSC 5 +#define HLOS1_VOTE_MMNOC_MMU_TBU_HF0_GDSC 6 +#define HLOS1_VOTE_MMNOC_MMU_TBU_HF1_GDSC 7 +#define HLOS1_VOTE_MMNOC_MMU_TBU_SF0_GDSC 8 +#define HLOS1_VOTE_MMNOC_MMU_TBU_SF1_GDSC 9 + #endif |