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authorKirill Marinushkin <[email protected]>2018-04-04 06:19:39 +0200
committerMark Brown <[email protected]>2018-04-16 17:52:31 +0100
commite590522a06adce8ca2eb47e77d80616cd1542d91 (patch)
tree2430d1b9ab55e3708fe5d6995dfd3234c8fdb8b0 /include/uapi
parent933e1c4a667103c4d10ebdc9505a0a6abd8c3fbd (diff)
ASoC: topology: Add definitions for mclk_direction values
Current comment makes not clear the direction of mclk. Previously, similar description caused a misunderstanding for bclk_master and fsync_master. This commit solves the potential confusion the same way it is solved for bclk_master and fsync_master. Signed-off-by: Kirill Marinushkin <[email protected]> Acked-by: Pierre-Louis Bossart <[email protected]> Cc: Jaroslav Kysela <[email protected]> Cc: Takashi Iwai <[email protected]> Cc: Mark Brown <[email protected]> Cc: Pan Xiuli <[email protected]> Cc: Liam Girdwood <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'include/uapi')
-rw-r--r--include/uapi/sound/asoc.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/include/uapi/sound/asoc.h b/include/uapi/sound/asoc.h
index f3c4b46e39d8..b901cdbe532a 100644
--- a/include/uapi/sound/asoc.h
+++ b/include/uapi/sound/asoc.h
@@ -144,6 +144,10 @@
#define SND_SOC_TPLG_DAI_CLK_GATE_GATED 1
#define SND_SOC_TPLG_DAI_CLK_GATE_CONT 2
+/* DAI mclk_direction */
+#define SND_SOC_TPLG_MCLK_CO 0 /* for codec, mclk is output */
+#define SND_SOC_TPLG_MCLK_CI 1 /* for codec, mclk is input */
+
/* DAI physical PCM data formats.
* Add new formats to the end of the list.
*/
@@ -334,7 +338,7 @@ struct snd_soc_tplg_hw_config {
__u8 invert_fsync; /* 1 for inverted frame clock, 0 for normal */
__u8 bclk_master; /* SND_SOC_TPLG_BCLK_ value */
__u8 fsync_master; /* SND_SOC_TPLG_FSYNC_ value */
- __u8 mclk_direction; /* 0 for input, 1 for output */
+ __u8 mclk_direction; /* SND_SOC_TPLG_MCLK_ value */
__le16 reserved; /* for 32bit alignment */
__le32 mclk_rate; /* MCLK or SYSCLK freqency in Hz */
__le32 bclk_rate; /* BCLK freqency in Hz */