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| author | Takashi Iwai <tiwai@suse.de> | 2022-12-22 09:11:48 +0100 |
|---|---|---|
| committer | Takashi Iwai <tiwai@suse.de> | 2022-12-22 09:11:48 +0100 |
| commit | 2d78eb0342dd2c9c5cde9ae9ada1d33f189a858b (patch) | |
| tree | f711bc9cab45f4963e4883ef15ff4c54a6cbc12e /include/soc/at91/sama7-ddr.h | |
| parent | b47068b4aa53a57552398e3f60d0ed1918700c2b (diff) | |
| parent | ee0b089d660021792e4ab4dda191b097ce1e964f (diff) | |
Merge branch 'for-next' into for-linus
Diffstat (limited to 'include/soc/at91/sama7-ddr.h')
| -rw-r--r-- | include/soc/at91/sama7-ddr.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/include/soc/at91/sama7-ddr.h b/include/soc/at91/sama7-ddr.h index 6ce3bd22f6c6..5ad7ac2e3a7c 100644 --- a/include/soc/at91/sama7-ddr.h +++ b/include/soc/at91/sama7-ddr.h @@ -26,7 +26,10 @@ #define DDR3PHY_PGSR (0x0C) /* DDR3PHY PHY General Status Register */ #define DDR3PHY_PGSR_IDONE (1 << 0) /* Initialization Done */ -#define DDR3PHY_ACIOCR (0x24) /* DDR3PHY AC I/O Configuration Register */ +#define DDR3PHY_ACDLLCR (0x14) /* DDR3PHY AC DLL Control Register */ +#define DDR3PHY_ACDLLCR_DLLSRST (1 << 30) /* DLL Soft Reset */ + +#define DDR3PHY_ACIOCR (0x24) /* DDR3PHY AC I/O Configuration Register */ #define DDR3PHY_ACIOCR_CSPDD_CS0 (1 << 18) /* CS#[0] Power Down Driver */ #define DDR3PHY_ACIOCR_CKPDD_CK0 (1 << 8) /* CK[0] Power Down Driver */ #define DDR3PHY_ACIORC_ACPDD (1 << 3) /* AC Power Down Driver */ |