diff options
| author | Alyssa Rosenzweig <[email protected]> | 2022-02-15 13:46:51 -0500 |
|---|---|---|
| committer | Matthias Brugger <[email protected]> | 2022-03-01 08:21:28 +0100 |
| commit | dcfd5192563909219f6304b4e3e10db071158eef (patch) | |
| tree | cfa8074622cc7db199b0572206f965b22cd92634 /include/linux | |
| parent | 15f1768365aed810826a61fef4a744437aa5b426 (diff) | |
soc: mediatek: mtk-infracfg: Disable ACP on MT8192
MT8192 contains an experimental Accelerator Coherency Port
implementation, which does not work correctly but was unintentionally
enabled by default. For correct operation of the GPU, we must set a
chicken bit disabling ACP on MT8192.
Adapted from the following downstream change to the out-of-tree, legacy
Mali GPU driver:
https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/2781271/5
Note this change is required for both Panfrost and the legacy kernel
driver.
Co-developed-by: Robin Murphy <[email protected]>
Signed-off-by: Robin Murphy <[email protected]>
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Cc: Nick Fan <[email protected]>
Cc: Nicolas Boichat <[email protected]>
Cc: Chen-Yu Tsai <[email protected]>
Cc: Stephen Boyd <[email protected]>
Cc: AngeloGioacchino Del Regno <[email protected]>
Tested-by: AngeloGioacchino Del Regno <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Matthias Brugger <[email protected]>
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/soc/mediatek/infracfg.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/linux/soc/mediatek/infracfg.h b/include/linux/soc/mediatek/infracfg.h index 8a1c2040a28e..50804ac748bd 100644 --- a/include/linux/soc/mediatek/infracfg.h +++ b/include/linux/soc/mediatek/infracfg.h @@ -277,6 +277,9 @@ #define INFRA_TOPAXI_PROTECTEN_SET 0x0260 #define INFRA_TOPAXI_PROTECTEN_CLR 0x0264 +#define MT8192_INFRA_CTRL 0x290 +#define MT8192_INFRA_CTRL_DISABLE_MFG2ACP BIT(9) + #define REG_INFRA_MISC 0xf00 #define F_DDR_4GB_SUPPORT_EN BIT(13) |