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authorMark Brown <[email protected]>2024-04-09 23:27:01 +0100
committerMark Brown <[email protected]>2024-04-09 23:27:01 +0100
commit6451246884d0e57bc12a0d4563753d4ae588fb1d (patch)
tree0f9856d2f84a08d5c5eb384256a756ccaf5dda69 /include/linux
parente2ff3bd86dd739dbd807985dd7a7283c4c8bbe06 (diff)
parent08e02fa48429c34db231cc3b58b940de2f7caf35 (diff)
ASoC: ti: davinci-i2s: Add features to McBSP
Merge series from Bastien Curutchet <[email protected]>: This series aims to add some features to McBSP driver. Convert bindings from .txt to .yaml. Add possibility to use an external clock as sample rate generator's input. Add handling of new formats (TDM, S24_LE, BP_FC). Enable the detection of unexpected frame pulses. Set the clock free-running mode according to SND_SOC_DAIFMT_[GATED/CONT] configuration in DAI format. Add ti,T1-framing[tx/rx] properties in DT. They allow to set the data delay to two bit-clock periods. This has been tested on a platform designed off of the DAVINCI/OMAP-L138 connected to 3 daisy-chained AD7767. An external clock drives the sample rate generator through the CLKS pin. The hardware I have only allowed me to test acquisition side of McBSP. It is connected to a 6 channels TDM and acts as Bit clock provider and Frame clock consumer.
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/platform_data/davinci_asp.h15
1 files changed, 0 insertions, 15 deletions
diff --git a/include/linux/platform_data/davinci_asp.h b/include/linux/platform_data/davinci_asp.h
index c8645b2ed3c0..b9c8520b4bd3 100644
--- a/include/linux/platform_data/davinci_asp.h
+++ b/include/linux/platform_data/davinci_asp.h
@@ -26,16 +26,6 @@ struct davinci_mcasp_pdata {
struct gen_pool *sram_pool;
/*
- * If McBSP peripheral gets the clock from an external pin,
- * there are three chooses, that are MCBSP_CLKX, MCBSP_CLKR
- * and MCBSP_CLKS.
- * Depending on different hardware connections it is possible
- * to use this setting to change the behaviour of McBSP
- * driver.
- */
- int clk_input_pin;
-
- /*
* This flag works when both clock and FS are outputs for the cpu
* and makes clock more accurate (FS is not symmetrical and the
* clock is very fast.
@@ -91,11 +81,6 @@ enum {
MCASP_VERSION_OMAP, /* OMAP4/5 */
};
-enum mcbsp_clk_input_pin {
- MCBSP_CLKR = 0, /* as in DM365 */
- MCBSP_CLKS,
-};
-
#define INACTIVE_MODE 0
#define TX_MODE 1
#define RX_MODE 2