Merge tag 'coresight-next-v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux into char-misc-next

Suzuki writes:

coresigh: Updates for v6.6

Coresight and hwtracing subsystem updates for Linux v6.6 includes:

 - ACPI support for CoreSight ETMv4x via system instructions and Arm ETE (v9.x).
 - Fix potential sleeping in atomic context for TRBE driver
 - Fix memory leak in ACPI platform parsing code
 - Fix all warnings with W=1
 - Fix warning with double free attempt for TRBE platform data
 - Miscellaneous cleanups and fixes

 Signed-off-by: Suzuki K Poulose <[email protected]>

* tag 'coresight-next-v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux:
  coresight: trbe: Fix TRBE potential sleep in atomic context
  coresight: Fix memory leak in acpi_buffer->pointer
  coresight: etm4x: Ensure valid drvdata and clock before clk_put()
  coresight: trbe: Allocate platform data per device
  hwtracing: hisi_ptt: Use pci_dev_id() to simplify the code
  coresight: dummy: simplify the code with module_platform_driver
  coresight: tmc: Explicit type conversions to prevent integer overflow
  coresight: trbe: Directly use ID_AA64DFR0_EL1_TraceBuffer_IMP
  coresight: Fix all W=1 build warnings
  coresight: etm4x: Add ACPI support in platform driver
  coresight: platform: acpi: Ignore the absence of graph
  coresight: etm4x: Change etm4_platform_driver driver for MMIO devices
  coresight: etm4x: Drop pid argument from etm4_probe()
  coresight: etm4x: Drop iomem 'base' argument from etm4_probe()
  coresight: etm4x: Allocate and device assign 'struct etmv4_drvdata' earlier
  hwtracing: coresight: Explicitly include correct DT includes

1 files changed, 59 insertions, 0 deletions

diff --git a/include/linux/coresight.h b/include/linux/coresight.h
index bf70987240e4..a269fffaf991 100644
--- a/include/linux/coresight.h
+++ b/include/linux/coresight.h
@@ -6,6 +6,8 @@
 #ifndef _LINUX_CORESIGHT_H
 #define _LINUX_CORESIGHT_H
 
+#include <linux/amba/bus.h>
+#include <linux/clk.h>
 #include <linux/device.h>
 #include <linux/io.h>
 #include <linux/perf_event.h>
@@ -386,6 +388,63 @@ static inline u32 csdev_access_relaxed_read32(struct csdev_access *csa,
 	return csa->read(offset, true, false);
 }
 
+#define CORESIGHT_CIDRn(i)	(0xFF0 + ((i) * 4))
+
+static inline u32 coresight_get_cid(void __iomem *base)
+{
+	u32 i, cid = 0;
+
+	for (i = 0; i < 4; i++)
+		cid |= readl(base + CORESIGHT_CIDRn(i)) << (i * 8);
+
+	return cid;
+}
+
+static inline bool is_coresight_device(void __iomem *base)
+{
+	u32 cid = coresight_get_cid(base);
+
+	return cid == CORESIGHT_CID;
+}
+
+/*
+ * Attempt to find and enable "APB clock" for the given device
+ *
+ * Returns:
+ *
+ * clk   - Clock is found and enabled
+ * NULL  - clock is not found
+ * ERROR - Clock is found but failed to enable
+ */
+static inline struct clk *coresight_get_enable_apb_pclk(struct device *dev)
+{
+	struct clk *pclk;
+	int ret;
+
+	pclk = clk_get(dev, "apb_pclk");
+	if (IS_ERR(pclk))
+		return NULL;
+
+	ret = clk_prepare_enable(pclk);
+	if (ret) {
+		clk_put(pclk);
+		return ERR_PTR(ret);
+	}
+	return pclk;
+}
+
+#define CORESIGHT_PIDRn(i)	(0xFE0 + ((i) * 4))
+
+static inline u32 coresight_get_pid(struct csdev_access *csa)
+{
+	u32 i, pid = 0;
+
+	for (i = 0; i < 4; i++)
+		pid |= csdev_access_relaxed_read32(csa, CORESIGHT_PIDRn(i)) << (i * 8);
+
+	return pid;
+}
+
 static inline u64 csdev_access_relaxed_read_pair(struct csdev_access *csa,
 						 u32 lo_offset, u32 hi_offset)
 {