diff options
| author | Kan Liang <[email protected]> | 2015-08-17 08:37:31 -0400 |
|---|---|---|
| committer | Ingo Molnar <[email protected]> | 2015-09-13 11:27:22 +0200 |
| commit | deb27519bf1f4b21a761c0675dbdf1196df7d72a (patch) | |
| tree | 3c7f88c756c4316b8e10265147b9c84795124797 /include/linux/timerqueue.h | |
| parent | d2878d642a4edd1d57c691dc3e4d7847cbf9d442 (diff) | |
perf/x86/intel: Fix LBR callstack issue caused by FREEZE_LBRS_ON_PMI
This patch fixes an issue which introduced by commit
1a78d93750bb5f61abdc59a91fc3bd06a214542a ("perf/x86/intel: Streamline
LBR MSR handling in PMI").
The old patch not only avoids writing LBR_SELECT MSR in PMI, but also
avoids updating lbr_select variable. So in PMI, FREEZE_LBRS_ON_PMI bit
is always mistakenly set for IA32_DEBUGCTLMSR MSR, which causes
superfluous increase/decrease of LBR_TOS when collecting LBR callstack.
Reported-by: Milian Wolff <[email protected]>
Signed-off-by: Kan Liang <[email protected]>
Signed-off-by: Peter Zijlstra (Intel) <[email protected]>
Cc: Arnaldo Carvalho de Melo <[email protected]>
Cc: Jiri Olsa <[email protected]>
Cc: Linus Torvalds <[email protected]>
Cc: Peter Zijlstra <[email protected]>
Cc: Stephane Eranian <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: Vince Weaver <[email protected]>
Link: http://lkml.kernel.org/r/[email protected]
Signed-off-by: Ingo Molnar <[email protected]>
Diffstat (limited to 'include/linux/timerqueue.h')
0 files changed, 0 insertions, 0 deletions