ARM: MXC: mxcmmc: work around a bug in the SDHC busy line handling

MX3 SoCs have a silicon bug which corrupts CRC calculation of
multi-block transfers when connected SDIO peripheral doesn't drive the
BUSY line as required by the specs.

One way to prevent this is to only allow 1-bit transfers.

Another way is playing tricks with the DMA engine, but this isn't
mainline yet. So for now, we live with the performance drawback of 1-bit
transfers until a nicer solution is found.

This patch introduces a new host controller callback 'init_card' which
is for now only called from mmc_sdio_init_card().

Signed-off-by: Daniel Mack <[email protected]>
Cc: Sascha Hauer <[email protected]>
Cc: Dan Williams <[email protected]>
Cc: Volker Ernst <[email protected]>
Cc: Jiri Kosina <[email protected]>
Cc: Michał Mirosław <[email protected]>
Signed-off-by: Sascha Hauer <[email protected]>

0 files changed, 0 insertions, 0 deletions