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authorThomas Gleixner <tglx@linutronix.de>2017-03-09 12:06:41 +0100
committerThomas Gleixner <tglx@linutronix.de>2017-03-09 12:06:41 +0100
commit920c634aff6cb66e7f352668521eb1313897e93c (patch)
tree0f2e2eb15756fdd93c8ea47f9080fc3c1abeeae6 /include/linux/preempt.h
parentb28ace12661fbcfd90959c1e84ff5a85113a82a1 (diff)
parent4b9de5da7e120c7f02395da729f0ec77ce7a6044 (diff)
Merge tag 'irq-fixes-4.11-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent
Pull irqchip/irqdomain updates for 4.11-rc2 from Marc Zyngier - irqchip/crossbar: Some type tidying up - irqchip/gicv3-its: Workaround for a Qualcomm erratum - irqdomain: Compile for for systems that don't use CONFIG_IRQ_DOMAIN Fixed up minor conflict in the crossbar driver.
Diffstat (limited to 'include/linux/preempt.h')
-rw-r--r--include/linux/preempt.h21
1 files changed, 21 insertions, 0 deletions
diff --git a/include/linux/preempt.h b/include/linux/preempt.h
index 7eeceac52dea..cae461224948 100644
--- a/include/linux/preempt.h
+++ b/include/linux/preempt.h
@@ -55,6 +55,27 @@
/* We use the MSB mostly because its available */
#define PREEMPT_NEED_RESCHED 0x80000000
+#define PREEMPT_DISABLED (PREEMPT_DISABLE_OFFSET + PREEMPT_ENABLED)
+
+/*
+ * Disable preemption until the scheduler is running -- use an unconditional
+ * value so that it also works on !PREEMPT_COUNT kernels.
+ *
+ * Reset by start_kernel()->sched_init()->init_idle()->init_idle_preempt_count().
+ */
+#define INIT_PREEMPT_COUNT PREEMPT_OFFSET
+
+/*
+ * Initial preempt_count value; reflects the preempt_count schedule invariant
+ * which states that during context switches:
+ *
+ * preempt_count() == 2*PREEMPT_DISABLE_OFFSET
+ *
+ * Note: PREEMPT_DISABLE_OFFSET is 0 for !PREEMPT_COUNT kernels.
+ * Note: See finish_task_switch().
+ */
+#define FORK_PREEMPT_COUNT (2*PREEMPT_DISABLE_OFFSET + PREEMPT_ENABLED)
+
/* preempt_count() and related functions, depends on PREEMPT_NEED_RESCHED */
#include <asm/preempt.h>