diff options
author | Colin Ian King <[email protected]> | 2021-04-09 10:01:03 +0100 |
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committer | Stephen Boyd <[email protected]> | 2021-04-12 19:09:59 -0700 |
commit | f6b1340dc751a6caa2a0567b667d0f4f4172cd58 (patch) | |
tree | 63ce5ae4386771ca079a12f18e9aa781d7ee19b4 /include/linux/fpga | |
parent | a38fd8748464831584a19438cbb3082b5a2dab15 (diff) |
clk: uniphier: Fix potential infinite loop
The for-loop iterates with a u8 loop counter i and compares this
with the loop upper limit of num_parents that is an int type.
There is a potential infinite loop if num_parents is larger than
the u8 loop counter. Fix this by making the loop counter the same
type as num_parents. Also make num_parents an unsigned int to
match the return type of the call to clk_hw_get_num_parents.
Addresses-Coverity: ("Infinite loop")
Fixes: 734d82f4a678 ("clk: uniphier: add core support code for UniPhier clock driver")
Signed-off-by: Colin Ian King <[email protected]>
Reviewed-by: Masahiro Yamada <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'include/linux/fpga')
0 files changed, 0 insertions, 0 deletions