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authorRob Herring <[email protected]>2022-03-01 13:03:59 -0600
committerStephen Boyd <[email protected]>2022-03-24 19:24:10 -0700
commit3b1db05cee0738166cdd0f335ea93e8b0ecf6e08 (patch)
treea5d1315af54b0b57fd40c062855ba40d23381bd3 /include/linux/fpga
parent892e0ddea1aa6f70b68cb2dd8e16bf271e20e72f (diff)
dt-bindings: clock: renesas: Make example 'clocks' parsable
'clocks' in the example is not parsable with the 0 phandle value because the number of #clock-cells is unknown in the previous entry. Solve this by adding the clock provider node. Only 'cpg_clocks' is needed as the examples are built with fixups which can be used to identify phandles. This is in preparation to support schema validation on .dtb files. Signed-off-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Acked-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Acked-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'include/linux/fpga')
0 files changed, 0 insertions, 0 deletions