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authorDavid S. Miller <davem@davemloft.net>2018-10-14 20:22:28 -0700
committerDavid S. Miller <davem@davemloft.net>2018-10-14 20:22:28 -0700
commitd1f1f98c6d1708a90436e1a3b2aff5e93946731b (patch)
treeae685ee0f6253c4193228830230e5a45489a3c64 /include/linux/fpga/fpga-mgr.h
parentb3e1eb8e7ac9aaa283989496651d99267c4cad6c (diff)
sparc64: Set %l4 properly on trap return after handling signals.
If we did some signal processing, we have to reload the pt_regs tstate register because it's value may have changed. In doing so we also have to extract the %pil value contained in there anre load that into %l4. This value is at bit 20 and thus needs to be shifted down before we later write it into the %pil register. Most of the time this is harmless as we are returning to userspace and the %pil is zero for that case. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/linux/fpga/fpga-mgr.h')
0 files changed, 0 insertions, 0 deletions