diff options
| author | Markos Chandras <[email protected]> | 2014-11-10 12:25:34 +0000 |
|---|---|---|
| committer | Ralf Baechle <[email protected]> | 2014-11-24 07:44:05 +0100 |
| commit | cf0a8aa0226da5de88011e7f30eff22a894b2f49 (patch) | |
| tree | b508470022cd20f8cf0fcb8be10ee7f2904e07bc /include/linux/fpga/fpga-mgr.h | |
| parent | 4ec8f9e9b08451303253249e4e302f10ee23d565 (diff) | |
MIPS: cpu-probe: Set the FTLB probability bit on supported cores
Make use of the Config6/FLTBP bit to set the probability of a TLBWR
instruction to hit the FTLB or the VTLB. A value of 0 (which may be
the default value on certain cores, such as proAptiv or P5600)
means that a TLBWR instruction will never hit the VTLB which
leads to performance limitations since it effectively decreases
the number of available TLB slots.
Signed-off-by: Markos Chandras <[email protected]>
Reviewed-by: James Hogan <[email protected]>
Cc: <[email protected]> # v3.15+
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/8368/
Signed-off-by: Ralf Baechle <[email protected]>
Diffstat (limited to 'include/linux/fpga/fpga-mgr.h')
0 files changed, 0 insertions, 0 deletions