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authorVille Syrjälä <[email protected]>2014-06-09 16:20:46 +0300
committerJani Nikula <[email protected]>2014-06-11 11:06:43 +0300
commit2b85886a5457f5c5dbcd32edbd4e6bba0f4e8678 (patch)
tree0ff743117226f617f03bd93baac114f5e536bf2a /include/linux/fpga/fpga-mgr.h
parent0368920e51ae0cded0eb518c340a4dd17764d461 (diff)
drm/i915: Avoid div-by-zero when pixel_multiplier is zero
On certain platforms pixel_multiplier is read out in .get_pipe_config(), but it also gets used to calculate the pixel clock in intel_sdvo_get_config(). If the pipe is disable but some SDVO outputs are active, we may end up dividing by zero in intel_sdvo_get_config(). To avoid the problem simply check for zero pixel_multiplier and skip the division. Another attempt at fixing this involved populating pixel_multiplier to 1 even for disabled pipes, but that triggered a WARN because SDVO_CMD_GET_CLOCK_RATE_MULT command failed and thus encoder_pixel_multiplier was left at zero and didn't match pipe_config->pixel_multiplier. The "divide by pixel_multiplier" operation got introduced here: commit 18442d08786472c63a0a80c27f92b033dffc26de Author: Ville Syrjälä <[email protected]> Date: Fri Sep 13 16:00:08 2013 +0300 drm/i915: Fix port_clock and adjusted_mode.clock readout all over and it has caused a regression on certain machines since they would hit the div-by-zero during resume. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76520 Cc: <[email protected]> # 3.13+ Tested-by: Tim Richardson <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Signed-off-by: Jani Nikula <[email protected]>
Diffstat (limited to 'include/linux/fpga/fpga-mgr.h')
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