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authorDmytro Laktyushkin <[email protected]>2022-08-30 15:16:40 -0400
committerAlex Deucher <[email protected]>2022-09-21 17:18:39 -0400
commitcb0eca01ad9756e853efec3301203c2b5b45aa9f (patch)
tree1217831d7c695ab029a23ef74a8d5c3cdd912a1e /include/linux/fpga/fpga-bridge.h
parentb261509952bc19d1012cf732f853659be6ebc61e (diff)
drm/amd/display: fix dcn315 memory channel count and width read
[Why & How] Correctly set ddr5 channel width to 8 bytes Reviewed-by: Jun Lei <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Dmytro Laktyushkin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'include/linux/fpga/fpga-bridge.h')
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