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authorChris Park <[email protected]>2022-09-12 22:36:49 +0800
committerAlex Deucher <[email protected]>2022-09-21 17:16:22 -0400
commit88d4cea24049de0fa073462b24ab471ecd685d8a (patch)
tree8e294e26cf5f11fbf6e12192b648b0586e027766 /include/linux/fpga/fpga-bridge.h
parent37a0bad677a76e51c5e9e53f5d9f8f4f3e77912f (diff)
drm/amd/display: Port DCN30 420 logic to DCN32
[Why] 420 modes are limited by FMT buffer width of 4096 which requires multi-pipe support in form of ODM combine. If 420 modes have greater HActive than 4096, the DML logic should accomodate whether it should be rejected, or ODM combine 2:1 or 4:1 is triggered accordingly. [How] FMT Buffer limit of 4096 in DCN32. Force ODM combine depending on HActive and FMT Buffer limit. Reject modes if TMDS 420 and above 4096. Acked-by: Wayne Lin <[email protected]> Signed-off-by: Chris Park <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'include/linux/fpga/fpga-bridge.h')
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