diff options
| author | Biju Das <[email protected]> | 2022-05-10 12:06:52 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <[email protected]> | 2022-06-06 11:13:30 +0200 |
| commit | 1fb7a9fb6295220eb96c490581316b35fce180fe (patch) | |
| tree | 8f23234e33f9455d89c24788e434002f27a41ce6 /include/linux/fpga/fpga-bridge.h | |
| parent | f2906aa863381afb0015a9eb7fefad885d4e5a56 (diff) | |
clk: renesas: r9a07g044: Add GPT clock and reset entry
Add GPT clock and reset entry to CPG driver.
Signed-off-by: Biju Das <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>
Diffstat (limited to 'include/linux/fpga/fpga-bridge.h')
0 files changed, 0 insertions, 0 deletions