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authorMahesh Kumar <mahesh1.kumar@intel.com>2018-04-09 09:11:03 +0530
committerMaarten Lankhorst <maarten.lankhorst@linux.intel.com>2018-04-09 13:37:07 +0200
commitddf343191420e88479027fec9dc8efc0cafb63ef (patch)
treee223c5bece1b9aa499943afc85e92144c7523fc6 /fs
parentf34a291c0a9f141728b2ad852066322ca38d3cdb (diff)
drm/i915/skl+: support verification of DDB HW state for NV12
For YUV 420 Planar formats like NV12, buffer allocation is done for Y and UV surfaces separately. For NV12 plane formats, the UV buffer allocation must be programmed in the Plane Buffer Config register and the Y buffer allocation must be programmed in the Plane NV12 Buffer Config register. Both register values should be verified during verify_wm_state. v2: Addressed review comments by Maarten. v3: Addressed review comments by Shashank Sharma. v4: Adding reviewed by tag from Shashank Sharma v5: Added reviewed by from Juha-Pekka Heikkila v6: Rebased the series Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> Reviewed-by: Shashank Sharma <shashank.sharma@intel.com> Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1523245273-30264-5-git-send-email-vidya.srinivas@intel.com
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