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authorJingoo Han <[email protected]>2013-07-31 17:14:10 +0900
committerBjorn Helgaas <[email protected]>2013-08-12 12:18:20 -0600
commit4b1ced841b2e31470ae4bb47988891754ce4d8c7 (patch)
tree8fdf59944d73d9b946922e9d3c42239acce6aa8f /fs/jbd/commit.c
parent5477a33b51b7282aca731213dc592b5f0c4e7c13 (diff)
PCI: exynos: Split into Synopsys part and Exynos part
Exynos PCIe IP consists of Synopsys specific part and Exynos specific part. Only core block is a Synopsys Designware part; other parts are Exynos specific. Also, the Synopsys Designware part can be shared with other platforms; thus, it can be split two parts such as Synopsys Designware part and Exynos specific part. Signed-off-by: Jingoo Han <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Cc: Pratyush Anand <[email protected]> Cc: Mohit KUMAR <[email protected]>
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