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authorMark Rustad <mark.d.rustad@intel.com>2015-08-08 16:27:41 -0700
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2015-09-23 23:00:03 -0700
commit9de7605ea2389d5ab86d6fbb3f1a11b87665a35c (patch)
tree73839f52cd062e405c91426aa7cb1b627095689f /fs/btrfs/async-thread.c
parent018d7146eee1942f27675bdabf9b43586bfaef72 (diff)
ixgbe: Correct several flaws with with DCA setup
This change does two things. First, it makes it so that we always set the relaxed ordering bits related to the DCA registers even if DCA is not enabled. Second, it moves the configuration out of the ixgbe_down function and into the ixgbe_configure function before enabling the Rx and Tx rings. This ensures that DCA is configured correctly before starting to process packets. Thanks to Alex Duyck for this fix. CC: Alex Duyck <aduyck@mirantis.com> Signed-off-by: Mark Rustad <mark.d.rustad@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'fs/btrfs/async-thread.c')
0 files changed, 0 insertions, 0 deletions