diff options
| author | Paul Hsieh <paul.hsieh@amd.com> | 2024-06-20 17:09:25 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2024-07-01 16:10:35 -0400 |
| commit | fe4b8c98dd1fcfab6e6c18bbc0f0f31a64bba7a5 (patch) | |
| tree | da5e65c73ec697a40ee96d5823ca803a33322ab1 /drivers | |
| parent | d12b17e43aacc6a4a462f0918637b4097b72cf56 (diff) | |
drm/amd/display: un-block 8k with single dimm
[Why]
Driver doesn't validate multi-display with scaling when OS calls DDI.
This behavior causes the validated result to be a mismatch
between some automated test cases.
To address this issue, some workaround was added that caused issues in 8k.
[How]
Since the origin issue had been root caused,
revert the previous workaround and unblock 8k with a single dimm.
Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Paul Hsieh <paul.hsieh@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c | 22 |
1 files changed, 0 insertions, 22 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c index da73e842c55c..169924d0a839 100644 --- a/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c +++ b/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c @@ -1695,25 +1695,6 @@ static void dcn314_get_panel_config_defaults(struct dc_panel_config *panel_confi *panel_config = panel_config_defaults; } -static bool filter_modes_for_single_channel_workaround(struct dc *dc, - struct dc_state *context) -{ - // Filter 2K@240Hz+8K@24fps above combination timing if memory only has single dimm LPDDR - if (dc->clk_mgr->bw_params->vram_type == 34 && - dc->clk_mgr->bw_params->num_channels < 2 && - context->stream_count > 1) { - int total_phy_pix_clk = 0; - - for (int i = 0; i < context->stream_count; i++) - if (context->res_ctx.pipe_ctx[i].stream) - total_phy_pix_clk += context->res_ctx.pipe_ctx[i].stream->phy_pix_clk; - - if (total_phy_pix_clk >= (1148928+826260)) //2K@240Hz+8K@24fps - return true; - } - return false; -} - bool dcn314_validate_bandwidth(struct dc *dc, struct dc_state *context, bool fast_validate) @@ -1732,9 +1713,6 @@ bool dcn314_validate_bandwidth(struct dc *dc, if (!pipes) goto validate_fail; - if (filter_modes_for_single_channel_workaround(dc, context)) - goto validate_fail; - DC_FP_START(); // do not support self refresh only out = dcn30_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, fast_validate, false); |