diff options
| author | Siddharth Vadapalli <s-vadapalli@ti.com> | 2023-03-21 16:49:58 +0530 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2023-03-22 22:16:24 -0700 |
| commit | 186016da9cca040ae535de09ab1be67e32373443 (patch) | |
| tree | 6618f48332e99d549737ff214205746a5e89417d /drivers | |
| parent | 2e20e764f24e12cf906f6fe61d79d1bcb69d6b65 (diff) | |
net: ethernet: ti: am65-cpsw: Enable SGMII mode for J721E
TI's J721E SoC supports SGMII mode with the CPSW9G instance of the CPSW
Ethernet Switch. Thus, enable it by adding SGMII mode to the extra_modes
member of the "j721e_cpswxg_pdata" SoC data.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/net/ethernet/ti/am65-cpsw-nuss.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c index 66e1fe58b895..9ddb79776c88 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -2784,7 +2784,7 @@ static const struct am65_cpsw_pdata j721e_cpswxg_pdata = { .quirks = 0, .ale_dev_id = "am64-cpswxg", .fdqring_mode = K3_RINGACC_RING_MODE_MESSAGE, - .extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII), + .extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII), }; static const struct of_device_id am65_cpsw_nuss_of_mtable[] = { |