diff options
| author | Andy Yan <andy.yan@rock-chips.com> | 2023-10-18 17:42:39 +0800 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2023-10-24 21:29:11 +0200 |
| commit | 01d5a75370a60c3a8d691347ae6ebb2a9f8dc44a (patch) | |
| tree | d8a5e906ee6f0465b58f82af678968d49b9900a6 /drivers | |
| parent | 45ad07c7053df0b67e13d8deb574920d11651fb2 (diff) | |
drm/rockchip: vop2: remove the unsupported format of cluster window
The cluster window on vop2 doesn't support linear yuv
format(NV12/16/24), it only support afbc based yuv
format(DRM_FORMAT_YUV420_8BIT/10BIT), which will be
added in next patch.
Fixes: 604be85547ce ("drm/rockchip: Add VOP2 driver")
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231018094239.2475851-1-andyshrk@163.com
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 24 | ||||
| -rw-r--r-- | drivers/gpu/drm/rockchip/rockchip_vop2_reg.c | 3 |
2 files changed, 1 insertions, 26 deletions
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c index 20cf224bd30f..96f2312ff2e3 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c @@ -342,10 +342,6 @@ static enum vop2_afbc_format vop2_convert_afbc_format(u32 format) case DRM_FORMAT_RGB565: case DRM_FORMAT_BGR565: return VOP2_AFBC_FMT_RGB565; - case DRM_FORMAT_NV12: - return VOP2_AFBC_FMT_YUV420; - case DRM_FORMAT_NV16: - return VOP2_AFBC_FMT_YUV422; default: return VOP2_AFBC_FMT_INVALID; } @@ -366,25 +362,9 @@ static bool vop2_win_rb_swap(u32 format) } } -static bool vop2_afbc_rb_swap(u32 format) -{ - switch (format) { - case DRM_FORMAT_NV24: - return true; - default: - return false; - } -} - static bool vop2_afbc_uv_swap(u32 format) { - switch (format) { - case DRM_FORMAT_NV12: - case DRM_FORMAT_NV16: - return true; - default: - return false; - } + return false; } static bool vop2_win_uv_swap(u32 format) @@ -1232,7 +1212,6 @@ static void vop2_plane_atomic_update(struct drm_plane *plane, drm_err(vop2->drm, "vp%d %s stride[%d] not 64 pixel aligned\n", vp->id, win->data->name, stride); - rb_swap = vop2_afbc_rb_swap(fb->format->format); uv_swap = vop2_afbc_uv_swap(fb->format->format); /* * This is a workaround for crazy IC design, Cluster @@ -1249,7 +1228,6 @@ static void vop2_plane_atomic_update(struct drm_plane *plane, if (vop2_cluster_window(win)) vop2_win_write(win, VOP2_WIN_AFBC_ENABLE, 1); vop2_win_write(win, VOP2_WIN_AFBC_FORMAT, afbc_format); - vop2_win_write(win, VOP2_WIN_AFBC_RB_SWAP, rb_swap); vop2_win_write(win, VOP2_WIN_AFBC_UV_SWAP, uv_swap); vop2_win_write(win, VOP2_WIN_AFBC_AUTO_GATING_EN, 0); vop2_win_write(win, VOP2_WIN_AFBC_BLOCK_SPLIT_EN, 0); diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c index fcd4cf3072cd..a4fcccfa56e3 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c @@ -24,9 +24,6 @@ static const uint32_t formats_win_full_10bit[] = { DRM_FORMAT_BGR888, DRM_FORMAT_RGB565, DRM_FORMAT_BGR565, - DRM_FORMAT_NV12, - DRM_FORMAT_NV16, - DRM_FORMAT_NV24, }; static const uint32_t formats_win_full_10bit_yuyv[] = { |