diff options
| author | Huang Rui <ray.huang@amd.com> | 2014-10-28 19:54:28 +0800 |
|---|---|---|
| committer | Felipe Balbi <balbi@ti.com> | 2014-11-03 10:03:36 -0600 |
| commit | b5a65c406367e3e79ece6f687c83d4ffce4c174c (patch) | |
| tree | f8e0b8062965db9a6d1d5761ae9890c68c307e35 /drivers/usb/dwc3/core.h | |
| parent | 9a5b2f3167c1f98b879d6a800ab138f04e34f9d5 (diff) | |
usb: dwc3: add P3 in U2 SS inactive quirk
This patch adds P3 in U2 SS inactive quirk, and some special platforms can
configure that if it is needed.
[ balbi@ti.com : added DeviceTree binding documentation ]
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'drivers/usb/dwc3/core.h')
| -rw-r--r-- | drivers/usb/dwc3/core.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index f93145cb52f5..66fd26bfdbfa 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -176,6 +176,7 @@ /* Global USB3 PIPE Control Register */ #define DWC3_GUSB3PIPECTL_PHYSOFTRST (1 << 31) +#define DWC3_GUSB3PIPECTL_U2SSINP3OK (1 << 29) #define DWC3_GUSB3PIPECTL_SUSPHY (1 << 17) /* Global TX Fifo Size Register */ @@ -681,6 +682,7 @@ struct dwc3_scratchpad_array { * @three_stage_setup: set if we perform a three phase setup * @disable_scramble_quirk: set if we enable the disable scramble quirk * @u2exit_lfps_quirk: set if we enable u2exit lfps quirk + * @u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk */ struct dwc3 { struct usb_ctrlrequest *ctrl_req; @@ -790,6 +792,7 @@ struct dwc3 { unsigned disable_scramble_quirk:1; unsigned u2exit_lfps_quirk:1; + unsigned u2ss_inp3_quirk:1; }; /* -------------------------------------------------------------------------- */ |