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authorWill Deacon <will@kernel.org>2024-07-04 15:13:53 +0100
committerWill Deacon <will@kernel.org>2024-07-04 15:13:53 +0100
commitac4e52c69f2d20b13f37397f44fa3d59dc4a87f9 (patch)
tree12c02420f8200715b0c56be2671c16b58b2bef84 /drivers/usb/cdns3
parenta4ce399973d21494eab12e7049f38d47c0c4cb30 (diff)
parent0b4eeee2876f2b08442eb32081451bf130e01a4c (diff)
Merge branch 'for-joerg/arm-smmu/updates' into for-joerg/arm-smmu/next
* for-joerg/arm-smmu/updates: (29 commits) iommu/arm-smmu-qcom: Register the TBU driver in qcom_smmu_impl_init iommu/arm-smmu-v3: Enable HTTU for stage1 with io-pgtable mapping iommu/arm-smmu-v3: Add support for dirty tracking in domain alloc iommu/io-pgtable-arm: Add read_and_clear_dirty() support iommu/arm-smmu-v3: Add feature detection for HTTU iommu/arm-smmu-v3: Add support for domain_alloc_user fn iommu/arm-smmu-qcom: record reason for deferring probe iommu/arm-smmu: Pretty-print context fault related regs iommu/arm-smmu-qcom-debug: Do not print for handled faults iommu/arm-smmu: Add CB prefix to register bitfields iommu/arm-smmu-v3: add missing MODULE_DESCRIPTION() macro iommu/arm-smmu-v3: Shrink the strtab l1_desc array iommu/arm-smmu-v3: Do not zero the strtab twice iommu/arm-smmu-v3: Allow setting a S1 domain to a PASID iommu/arm-smmu-v3: Allow a PASID to be set when RID is IDENTITY/BLOCKED iommu/arm-smmu-v3: Test the STE S1DSS functionality iommu/arm-smmu-v3: Allow IDENTITY/BLOCKED to be set while PASID is used iommu/arm-smmu-v3: Put the SVA mmu notifier in the smmu_domain iommu/arm-smmu-v3: Keep track of arm_smmu_master_domain for SVA iommu/arm-smmu-v3: Make SVA allocate a normal arm_smmu_domain ...
Diffstat (limited to 'drivers/usb/cdns3')
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