aboutsummaryrefslogtreecommitdiff
path: root/drivers/usb/cdns3/cdnsp-pci.c
diff options
context:
space:
mode:
authorPiyush Mehta <piyush.mehta@amd.com>2022-09-12 16:40:17 +0530
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2022-09-22 15:52:30 +0200
commitd6edcdc1ef06800f63519caac9b01b81274e25b7 (patch)
tree02ab09c74fc5395020510020e2ab2bced5e043fe /drivers/usb/cdns3/cdnsp-pci.c
parentec50e114385f9ec7a5995a4b9b4be3a971061af7 (diff)
usb: dwc3: xilinx: fix usb3 non-wakeup source resume failure
When USB is in super-speed mode and disabled as a wakeup source, observed that on the resume path, lanes have not been configured properly in the phy-zynqmp driver. As a result, after the resume, USB device detection failed on host. To resolved the above issue, added phy_init on resume and phy_exit on suspend path, to configure the GT lanes correctly. The re-initialization of phy, reset the device and re-enumerate the USB subsystem. This use-case is specific to Xilinx ZynqMP SoC. Signed-off-by: Piyush Mehta <piyush.mehta@amd.com> Link: https://lore.kernel.org/r/20220912111017.901321-3-piyush.mehta@amd.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/usb/cdns3/cdnsp-pci.c')
0 files changed, 0 insertions, 0 deletions