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authorLinus Walleij <[email protected]>2021-06-11 15:01:59 +0200
committerLinus Walleij <[email protected]>2021-09-14 18:28:41 +0200
commitffc011b696f0c0e4cd8c991d09a6140e6b866865 (patch)
tree9c1840df5c69b64c64d02574def7773e4445b369 /drivers/usb/cdns3/cdns3-trace.c
parent6880fa6c56601bb8ed59df6c30fd390cc5f6dd8f (diff)
ARM: dts: ux500: Tag Janice display SPI correct
The s6e63m0 display used "type 3" SPI communication so flag the device as using negative clocking and polarity on the SPI bus. Signed-off-by: Linus Walleij <[email protected]>
Diffstat (limited to 'drivers/usb/cdns3/cdns3-trace.c')
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