diff options
| author | Kim Phillips <kim.phillips@amd.com> | 2023-07-20 14:47:27 -0500 |
|---|---|---|
| committer | Borislav Petkov (AMD) <bp@alien8.de> | 2023-07-22 18:04:22 +0200 |
| commit | fd470a8beed88440b160d690344fbae05a0b9b1b (patch) | |
| tree | 2355c8b0ee8742bf5c8c5f121450734bb3bf97e0 /drivers/usb/cdns3/cdns3-pci-wrap.c | |
| parent | 3ba2e83334bed2b1980b59734e6e84dfaf96026c (diff) | |
x86/cpu: Enable STIBP on AMD if Automatic IBRS is enabled
Unlike Intel's Enhanced IBRS feature, AMD's Automatic IBRS does not
provide protection to processes running at CPL3/user mode, see section
"Extended Feature Enable Register (EFER)" in the APM v2 at
https://bugzilla.kernel.org/attachment.cgi?id=304652
Explicitly enable STIBP to protect against cross-thread CPL3
branch target injections on systems with Automatic IBRS enabled.
Also update the relevant documentation.
Fixes: e7862eda309e ("x86/cpu: Support AMD Automatic IBRS")
Reported-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Kim Phillips <kim.phillips@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20230720194727.67022-1-kim.phillips@amd.com
Diffstat (limited to 'drivers/usb/cdns3/cdns3-pci-wrap.c')
0 files changed, 0 insertions, 0 deletions