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authorLinus Torvalds <torvalds@linux-foundation.org>2024-05-31 11:52:06 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2024-05-31 11:52:06 -0700
commitc6cc9799b4c16b1bd42de35be563d4fa6ea43799 (patch)
tree2647b1495c5589037740c9b3c3d5ecdaed3294f5 /drivers/usb/cdns3/cdns3-debug.h
parentff9bce3d06fbdd12bcc74657516757b66aca9e43 (diff)
parent1d84afaf02524d2558e8ca3ca169be2ef720380b (diff)
Merge tag 'riscv-for-linus-6.10-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V fixes from Palmer Dabbelt: - A fix to avoid pt_regs aliasing with idle thread stacks on secondary harts. - HAVE_ARCH_HUGE_VMAP is enabled on XIP kernels, which fixes boot issues on XIP systems with huge pages. - An update to the uABI documentation clarifying that only scalar misaligned accesses were grandfathered in as supported, as the vector extension did not exist at the time the uABI was frozen. - A fix for the recently-added byte/half atomics to avoid losing the fully ordered decorations. * tag 'riscv-for-linus-6.10-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: Fix fully ordered LR/SC xchg[8|16]() implementations Documentation: RISC-V: uabi: Only scalar misaligned loads are supported riscv: enable HAVE_ARCH_HUGE_VMAP for XIP kernel riscv: prevent pt_regs corruption for secondary idle threads
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