diff options
| author | Ingo Molnar <[email protected]> | 2020-02-24 11:36:09 +0100 |
|---|---|---|
| committer | Ingo Molnar <[email protected]> | 2020-02-24 11:36:09 +0100 |
| commit | 546121b65f47384e11ec1fa2e55449fc9f4846b2 (patch) | |
| tree | 8f18470ec7c0c77b0f48eb1b2338e591b0b0aaff /drivers/tty/serial/ip22zilog.c | |
| parent | 000619680c3714020ce9db17eef6a4a7ce2dc28b (diff) | |
| parent | f8788d86ab28f61f7b46eb6be375f8a726783636 (diff) | |
Merge tag 'v5.6-rc3' into sched/core, to pick up fixes and dependent patches
Signed-off-by: Ingo Molnar <[email protected]>
Diffstat (limited to 'drivers/tty/serial/ip22zilog.c')
| -rw-r--r-- | drivers/tty/serial/ip22zilog.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/tty/serial/ip22zilog.c b/drivers/tty/serial/ip22zilog.c index 8c810733df3d..86fff69d7e7c 100644 --- a/drivers/tty/serial/ip22zilog.c +++ b/drivers/tty/serial/ip22zilog.c @@ -38,10 +38,6 @@ #include <asm/sgi/hpc3.h> #include <asm/sgi/ip22.h> -#if defined(CONFIG_SERIAL_IP22_ZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) -#define SUPPORT_SYSRQ -#endif - #include <linux/serial_core.h> #include "ip22zilog.h" @@ -1080,6 +1076,7 @@ static struct uart_driver ip22zilog_reg = { static void __init ip22zilog_prepare(void) { + unsigned char sysrq_on = IS_ENABLED(CONFIG_SERIAL_IP22_ZILOG_CONSOLE); struct uart_ip22zilog_port *up; struct zilog_layout *rp; int channel, chip; @@ -1115,6 +1112,7 @@ static void __init ip22zilog_prepare(void) up[(chip * 2) + 0].port.irq = zilog_irq; up[(chip * 2) + 0].port.uartclk = ZS_CLOCK; up[(chip * 2) + 0].port.fifosize = 1; + up[(chip * 2) + 0].port.has_sysrq = sysrq_on; up[(chip * 2) + 0].port.ops = &ip22zilog_pops; up[(chip * 2) + 0].port.type = PORT_IP22ZILOG; up[(chip * 2) + 0].port.flags = 0; @@ -1126,6 +1124,7 @@ static void __init ip22zilog_prepare(void) up[(chip * 2) + 1].port.irq = zilog_irq; up[(chip * 2) + 1].port.uartclk = ZS_CLOCK; up[(chip * 2) + 1].port.fifosize = 1; + up[(chip * 2) + 1].port.has_sysrq = sysrq_on; up[(chip * 2) + 1].port.ops = &ip22zilog_pops; up[(chip * 2) + 1].port.type = PORT_IP22ZILOG; up[(chip * 2) + 1].port.line = (chip * 2) + 1; |