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authorKishon Vijay Abraham I <kishon@ti.com>2017-03-27 15:15:20 +0530
committerBjorn Helgaas <bhelgaas@google.com>2017-04-28 10:23:20 -0500
commit2c949ce38f4e81d7487f165fa3b8f77d74a2a6c4 (patch)
treebed29b8550b6e10eec99f726062ac7b94e1f669e /drivers/target
parentf60b15b831b01973c71b54e82a258376f7593427 (diff)
ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to SW_WKUP
The PCIe programming sequence in TRM suggests CLKSTCTRL of PCIe should be set to SW_WKUP. There are no issues when CLKSTCTRL is set to HW_AUTO in RC mode. However in EP mode, the host system is not able to access the MEMSPACE and setting the CLKSTCTRL to SW_WKUP fixes it. Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/target')
0 files changed, 0 insertions, 0 deletions