diff options
| author | Dmitry Torokhov <[email protected]> | 2023-08-30 16:06:38 -0700 | 
|---|---|---|
| committer | Dmitry Torokhov <[email protected]> | 2023-08-30 16:06:38 -0700 | 
| commit | 1ac731c529cd4d6adbce134754b51ff7d822b145 (patch) | |
| tree | 143ab3f35ca5f3b69f583c84e6964b17139c2ec1 /drivers/spi/spi-tegra210-quad.c | |
| parent | 07b4c950f27bef0362dc6ad7ee713aab61d58149 (diff) | |
| parent | 54116d442e001e1b6bd482122043b1870998a1f3 (diff) | |
Merge branch 'next' into for-linus
Prepare input updates for 6.6 merge window.
Diffstat (limited to 'drivers/spi/spi-tegra210-quad.c')
| -rw-r--r-- | drivers/spi/spi-tegra210-quad.c | 31 | 
1 files changed, 21 insertions, 10 deletions
diff --git a/drivers/spi/spi-tegra210-quad.c b/drivers/spi/spi-tegra210-quad.c index 0b9bc3b7f53a..fbd14dd7be44 100644 --- a/drivers/spi/spi-tegra210-quad.c +++ b/drivers/spi/spi-tegra210-quad.c @@ -142,6 +142,7 @@  #define QSPI_GLOBAL_CONFIG			0X1a4  #define QSPI_CMB_SEQ_EN				BIT(0) +#define QSPI_TPM_WAIT_POLL_EN			BIT(1)  #define QSPI_CMB_SEQ_ADDR			0x1a8  #define QSPI_ADDRESS_VALUE_SET(X)		(((x) & 0xFFFF) << 0) @@ -164,6 +165,7 @@  struct tegra_qspi_soc_data {  	bool has_dma;  	bool cmb_xfer_capable; +	bool supports_tpm;  	unsigned int cs_count;  }; @@ -829,7 +831,7 @@ static u32 tegra_qspi_setup_transfer_one(struct spi_device *spi, struct spi_tran  		tegra_qspi_mask_clear_irq(tqspi);  		command1 = tqspi->def_command1_reg; -		command1 |= QSPI_CS_SEL(spi->chip_select); +		command1 |= QSPI_CS_SEL(spi_get_chipselect(spi, 0));  		command1 |= QSPI_BIT_LENGTH(bits_per_word - 1);  		command1 &= ~QSPI_CONTROL_MODE_MASK; @@ -960,11 +962,11 @@ static int tegra_qspi_setup(struct spi_device *spi)  	/* keep default cs state to inactive */  	val = tqspi->def_command1_reg; -	val |= QSPI_CS_SEL(spi->chip_select); +	val |= QSPI_CS_SEL(spi_get_chipselect(spi, 0));  	if (spi->mode & SPI_CS_HIGH) -		val &= ~QSPI_CS_POL_INACTIVE(spi->chip_select); +		val &= ~QSPI_CS_POL_INACTIVE(spi_get_chipselect(spi, 0));  	else -		val |= QSPI_CS_POL_INACTIVE(spi->chip_select); +		val |= QSPI_CS_POL_INACTIVE(spi_get_chipselect(spi, 0));  	tqspi->def_command1_reg = val;  	tegra_qspi_writel(tqspi, tqspi->def_command1_reg, QSPI_COMMAND1); @@ -1065,6 +1067,12 @@ static int tegra_qspi_combined_seq_xfer(struct tegra_qspi *tqspi,  	/* Enable Combined sequence mode */  	val = tegra_qspi_readl(tqspi, QSPI_GLOBAL_CONFIG); +	if (spi->mode & SPI_TPM_HW_FLOW) { +		if (tqspi->soc_data->supports_tpm) +			val |= QSPI_TPM_WAIT_POLL_EN; +		else +			return -EIO; +	}  	val |= QSPI_CMB_SEQ_EN;  	tegra_qspi_writel(tqspi, val, QSPI_GLOBAL_CONFIG);  	/* Process individual transfer list */ @@ -1196,6 +1204,8 @@ static int tegra_qspi_non_combined_seq_xfer(struct tegra_qspi *tqspi,  	/* Disable Combined sequence mode */  	val = tegra_qspi_readl(tqspi, QSPI_GLOBAL_CONFIG);  	val &= ~QSPI_CMB_SEQ_EN; +	if (tqspi->soc_data->supports_tpm) +		val &= ~QSPI_TPM_WAIT_POLL_EN;  	tegra_qspi_writel(tqspi, val, QSPI_GLOBAL_CONFIG);  	list_for_each_entry(transfer, &msg->transfers, transfer_list) {  		struct spi_transfer *xfer = transfer; @@ -1454,24 +1464,28 @@ static irqreturn_t tegra_qspi_isr_thread(int irq, void *context_data)  static struct tegra_qspi_soc_data tegra210_qspi_soc_data = {  	.has_dma = true,  	.cmb_xfer_capable = false, +	.supports_tpm = false,  	.cs_count = 1,  };  static struct tegra_qspi_soc_data tegra186_qspi_soc_data = {  	.has_dma = true,  	.cmb_xfer_capable = true, +	.supports_tpm = false,  	.cs_count = 1,  };  static struct tegra_qspi_soc_data tegra234_qspi_soc_data = {  	.has_dma = false,  	.cmb_xfer_capable = true, +	.supports_tpm = true,  	.cs_count = 1,  };  static struct tegra_qspi_soc_data tegra241_qspi_soc_data = {  	.has_dma = false,  	.cmb_xfer_capable = true, +	.supports_tpm = true,  	.cs_count = 4,  }; @@ -1552,8 +1566,7 @@ static int tegra_qspi_probe(struct platform_device *pdev)  	tqspi->soc_data = device_get_match_data(&pdev->dev);  	master->num_chipselect = tqspi->soc_data->cs_count; -	r = platform_get_resource(pdev, IORESOURCE_MEM, 0); -	tqspi->base = devm_ioremap_resource(&pdev->dev, r); +	tqspi->base = devm_platform_get_and_ioremap_resource(pdev, 0, &r);  	if (IS_ERR(tqspi->base))  		return PTR_ERR(tqspi->base); @@ -1630,7 +1643,7 @@ exit_pm_disable:  	return ret;  } -static int tegra_qspi_remove(struct platform_device *pdev) +static void tegra_qspi_remove(struct platform_device *pdev)  {  	struct spi_master *master = platform_get_drvdata(pdev);  	struct tegra_qspi *tqspi = spi_master_get_devdata(master); @@ -1639,8 +1652,6 @@ static int tegra_qspi_remove(struct platform_device *pdev)  	free_irq(tqspi->irq, tqspi);  	pm_runtime_force_suspend(&pdev->dev);  	tegra_qspi_deinit_dma(tqspi); - -	return 0;  }  static int __maybe_unused tegra_qspi_suspend(struct device *dev) @@ -1714,7 +1725,7 @@ static struct platform_driver tegra_qspi_driver = {  		.acpi_match_table = ACPI_PTR(tegra_qspi_acpi_match),  	},  	.probe =	tegra_qspi_probe, -	.remove =	tegra_qspi_remove, +	.remove_new =	tegra_qspi_remove,  };  module_platform_driver(tegra_qspi_driver);  |