diff options
| author | Takashi Iwai <tiwai@suse.de> | 2022-12-22 09:11:48 +0100 |
|---|---|---|
| committer | Takashi Iwai <tiwai@suse.de> | 2022-12-22 09:11:48 +0100 |
| commit | 2d78eb0342dd2c9c5cde9ae9ada1d33f189a858b (patch) | |
| tree | f711bc9cab45f4963e4883ef15ff4c54a6cbc12e /drivers/spi/spi-intel.c | |
| parent | b47068b4aa53a57552398e3f60d0ed1918700c2b (diff) | |
| parent | ee0b089d660021792e4ab4dda191b097ce1e964f (diff) | |
Merge branch 'for-next' into for-linus
Diffstat (limited to 'drivers/spi/spi-intel.c')
| -rw-r--r-- | drivers/spi/spi-intel.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/spi/spi-intel.c b/drivers/spi/spi-intel.c index 55f4ee2db002..3ac73691fbb5 100644 --- a/drivers/spi/spi-intel.c +++ b/drivers/spi/spi-intel.c @@ -52,17 +52,17 @@ #define FRACC 0x50 #define FREG(n) (0x54 + ((n) * 4)) -#define FREG_BASE_MASK 0x3fff +#define FREG_BASE_MASK GENMASK(14, 0) #define FREG_LIMIT_SHIFT 16 -#define FREG_LIMIT_MASK (0x03fff << FREG_LIMIT_SHIFT) +#define FREG_LIMIT_MASK GENMASK(30, 16) /* Offset is from @ispi->pregs */ #define PR(n) ((n) * 4) #define PR_WPE BIT(31) #define PR_LIMIT_SHIFT 16 -#define PR_LIMIT_MASK (0x3fff << PR_LIMIT_SHIFT) +#define PR_LIMIT_MASK GENMASK(30, 16) #define PR_RPE BIT(15) -#define PR_BASE_MASK 0x3fff +#define PR_BASE_MASK GENMASK(14, 0) /* Offsets are from @ispi->sregs */ #define SSFSTS_CTL 0x00 @@ -114,7 +114,7 @@ #define ERASE_OPCODE_SHIFT 8 #define ERASE_OPCODE_MASK (0xff << ERASE_OPCODE_SHIFT) #define ERASE_64K_OPCODE_SHIFT 16 -#define ERASE_64K_OPCODE_MASK (0xff << ERASE_OPCODE_SHIFT) +#define ERASE_64K_OPCODE_MASK (0xff << ERASE_64K_OPCODE_SHIFT) /* Flash descriptor fields */ #define FLVALSIG_MAGIC 0x0ff0a55a |