diff options
| author | Joshua Yeong <joshua.yeong@starfivetech.com> | 2024-05-15 13:02:52 +0800 |
|---|---|---|
| committer | Conor Dooley <conor.dooley@microchip.com> | 2024-05-28 12:34:11 +0100 |
| commit | cabff60ca77da6cb460988e2af40bde95776d92b (patch) | |
| tree | b997127aa411bd3bb023f43a1ca235317a7b7275 /drivers/rtc/rtc-core.h | |
| parent | c6005d4dd216a5eb0837432511cc87c9a19c5c9e (diff) | |
cache: Add StarFive StarLink cache management
Add StarFive Starlink cache management driver.
The driver enables RISC-V non-standard cache
operation on SoC that does not support Zicbom
extension instructions.
Signed-off-by: Joshua Yeong <joshua.yeong@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'drivers/rtc/rtc-core.h')
0 files changed, 0 insertions, 0 deletions