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authorPalmer Dabbelt <palmer@rivosinc.com>2022-07-14 14:37:33 -0700
committerPalmer Dabbelt <palmer@rivosinc.com>2022-07-14 14:39:27 -0700
commita8914b6cb8dd0e8ba215e6047f8ed0c88ba4ea7b (patch)
tree588a07a48764cc6d3843f65f48e4a6b5e8cecf4f /drivers/pwm
parent44c1e84a38a031758cf762c1902c2ae0b166c0d4 (diff)
parent88d319c6abaeb37f0e2323275eaf57a8388e0265 (diff)
Merge tag 'dt-for-palmer-v5.20-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git into for-next
Microchip RISC-V devicetrees for 5.20 A pair of changes for mpfs.dtsi: - A pair of patches from Suresh & I, removing the bogus max frequency properties from the controller nodes for {q,}spi. This is a device only property with no meaning for a controller and should never have been there. - RISC-V has no sensible defaults for cpu topology, so I added a this information to the dt for MPFS as a cpu-map. This is an optional property and therefore is not a fix. * tag 'dt-for-palmer-v5.20-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git: riscv: dts: microchip: Add mpfs' topology information riscv: dts: microchip: remove spi-max-frequency property riscv: dts: microchip: remove spi-max-frequency property
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