diff options
| author | Talha Nassar <talha.nassar@intel.com> | 2019-01-31 17:08:44 -0800 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-02-01 08:39:53 +0000 |
| commit | 0b904c890ac2d9947aad96ca48f0fe5a8d032459 (patch) | |
| tree | 76644bf5361c636fc333ec3f91068a8f8af85ee6 /drivers/pps/generators | |
| parent | ae598b0d6b50f5da3d31dc1fab9880b03c631b70 (diff) | |
drm/i915/icl: restore WaEnableFloatBlendOptimization
Enables blend optimization for floating point RTs
This restores the workaround that was reverted in c358514ba8da
("Revert "drm/i915/icl: WaEnableFloatBlendOptimization"").
The revert was due to the register write seemingly not sticking,
but the HW team has confirmed that this is because the
register is WO and that the workaround is indeed required.
Here the wa is added with a mask of 0 since the register is WO.
References: https://hsdes.intel.com/resource/1408134172
References: https://bugs.freedesktop.org/show_bug.cgi?id=107338
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Talha Nassar <talha.nassar@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/1548983324-15344-4-git-send-email-talha.nassar@intel.com
Diffstat (limited to 'drivers/pps/generators')
0 files changed, 0 insertions, 0 deletions