diff options
author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-09-24 09:29:24 +0200 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-09-24 09:32:53 +0200 |
commit | b599c89e8c5cf0c37352e0871be240291f8ce922 (patch) | |
tree | a03ce75b3a3d6d39852bc201b26bcfab412bf55f /drivers/pinctrl/sh-pfc/pfc-r8a7740.c | |
parent | ee1452d7458451a7508e0663553ce88d63958157 (diff) | |
parent | 4a10c2ac2f368583138b774ca41fac4207911983 (diff) |
Merge tag 'v3.12-rc2' into drm-intel-next
Backmerge Linux 3.12-rc2 to prep for a bunch of -next patches:
- Header cleanup in intel_drv.h, both changed in -fixes and my current
-next pile.
- Cursor handling cleanup for -next which depends upon the cursor
handling fix merged into -rc2.
All just trivial conflicts of the "changed adjacent lines" type:
drivers/gpu/drm/i915/i915_gem.c
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_drv.h
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/pinctrl/sh-pfc/pfc-r8a7740.c')
-rw-r--r-- | drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 48 |
1 files changed, 15 insertions, 33 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c index f6ea47c433b3..009174d07767 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c @@ -22,24 +22,16 @@ #include <linux/kernel.h> #include <linux/pinctrl/pinconf-generic.h> -#include <mach/r8a7740.h> #include <mach/irqs.h> #include "core.h" #include "sh_pfc.h" #define CPU_ALL_PORT(fn, pfx, sfx) \ - PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \ - PORT_10(fn, pfx##10, sfx), PORT_90(fn, pfx##1, sfx), \ - PORT_10(fn, pfx##20, sfx), \ - PORT_1(fn, pfx##210, sfx), PORT_1(fn, pfx##211, sfx) - -#undef _GPIO_PORT -#define _GPIO_PORT(gpio, sfx) \ - [gpio] = { \ - .name = __stringify(PORT##gpio), \ - .enum_id = PORT##gpio##_DATA, \ - } + PORT_10(0, fn, pfx, sfx), PORT_90(0, fn, pfx, sfx), \ + PORT_10(100, fn, pfx##10, sfx), PORT_90(100, fn, pfx##1, sfx), \ + PORT_10(200, fn, pfx##20, sfx), \ + PORT_1(210, fn, pfx##210, sfx), PORT_1(211, fn, pfx##211, sfx) #define IRQC_PIN_MUX(irq, pin) \ static const unsigned int intc_irq##irq##_pins[] = { \ @@ -590,11 +582,8 @@ enum { PINMUX_MARK_END, }; -#define _PORT_DATA(pfx, sfx) PORT_DATA_IO(pfx) -#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_PORT_DATA, , unused) - -static const pinmux_enum_t pinmux_data[] = { - PINMUX_DATA_GP_ALL(), +static const u16 pinmux_data[] = { + PINMUX_DATA_ALL(), /* Port0 */ PINMUX_DATA(DBGMDT2_MARK, PORT0_FN1), @@ -1537,13 +1526,6 @@ static const pinmux_enum_t pinmux_data[] = { PINMUX_DATA(TRACEAUD_FROM_MEMC_MARK, MSEL5CR_30_1, MSEL5CR_29_0), }; -#define R8A7740_PIN(pin, cfgs) \ - { \ - .name = __stringify(PORT##pin), \ - .enum_id = PORT##pin##_DATA, \ - .configs = cfgs, \ - } - #define __I (SH_PFC_PIN_CFG_INPUT) #define __O (SH_PFC_PIN_CFG_OUTPUT) #define __IO (SH_PFC_PIN_CFG_INPUT | SH_PFC_PIN_CFG_OUTPUT) @@ -1551,15 +1533,15 @@ static const pinmux_enum_t pinmux_data[] = { #define __PU (SH_PFC_PIN_CFG_PULL_UP) #define __PUD (SH_PFC_PIN_CFG_PULL_DOWN | SH_PFC_PIN_CFG_PULL_UP) -#define R8A7740_PIN_I_PD(pin) R8A7740_PIN(pin, __I | __PD) -#define R8A7740_PIN_I_PU(pin) R8A7740_PIN(pin, __I | __PU) -#define R8A7740_PIN_I_PU_PD(pin) R8A7740_PIN(pin, __I | __PUD) -#define R8A7740_PIN_IO(pin) R8A7740_PIN(pin, __IO) -#define R8A7740_PIN_IO_PD(pin) R8A7740_PIN(pin, __IO | __PD) -#define R8A7740_PIN_IO_PU(pin) R8A7740_PIN(pin, __IO | __PU) -#define R8A7740_PIN_IO_PU_PD(pin) R8A7740_PIN(pin, __IO | __PUD) -#define R8A7740_PIN_O(pin) R8A7740_PIN(pin, __O) -#define R8A7740_PIN_O_PU_PD(pin) R8A7740_PIN(pin, __O | __PUD) +#define R8A7740_PIN_I_PD(pin) SH_PFC_PIN_CFG(pin, __I | __PD) +#define R8A7740_PIN_I_PU(pin) SH_PFC_PIN_CFG(pin, __I | __PU) +#define R8A7740_PIN_I_PU_PD(pin) SH_PFC_PIN_CFG(pin, __I | __PUD) +#define R8A7740_PIN_IO(pin) SH_PFC_PIN_CFG(pin, __IO) +#define R8A7740_PIN_IO_PD(pin) SH_PFC_PIN_CFG(pin, __IO | __PD) +#define R8A7740_PIN_IO_PU(pin) SH_PFC_PIN_CFG(pin, __IO | __PU) +#define R8A7740_PIN_IO_PU_PD(pin) SH_PFC_PIN_CFG(pin, __IO | __PUD) +#define R8A7740_PIN_O(pin) SH_PFC_PIN_CFG(pin, __O) +#define R8A7740_PIN_O_PU_PD(pin) SH_PFC_PIN_CFG(pin, __O | __PUD) static struct sh_pfc_pin pinmux_pins[] = { /* Table 56-1 (I/O and Pull U/D) */ |