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author | Mrinmay Sarkar <quic_msarkar@quicinc.com> | 2024-03-18 11:34:28 +0530 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2024-05-28 09:51:17 -0500 |
commit | c94391ba52b9efa8797ad75a95c40c40df833c61 (patch) | |
tree | dfb59e6995eda583d961d122137a9223ccd82505 /drivers/pci/controller/dwc/pcie-qcom.c | |
parent | 0551abf2192dc944337516033678488cb08caa37 (diff) |
PCI: qcom-ep: Add HDMA support for SA8775P SoC
SA8775P SoC supports the new Hyper DMA (HDMA) DMA Engine inside the DWC IP,
so add support for it by passing the mapping format and the number of
read/write channels count.
The PCIe EP controller used on this SoC is of version 1.34.0, so a separate
config struct is introduced for the sake of enabling HDMA conditionally.
It should be noted that for the eDMA support (predecessor of HDMA), there
are no mapping format and channels count specified. That is because eDMA
supports auto detection of both parameters, whereas HDMA doesn't.
[mani: reworded commit message, added kdoc, and minor cleanups]
Link: https://lore.kernel.org/linux-pci/20240318-dw-hdma-v5-4-f04c5cdde760@linaro.org
Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Krzysztof WilczyĆski <kwilczynski@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Frank Li <frank.li@nxp.com>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-qcom.c')
0 files changed, 0 insertions, 0 deletions