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| author | Jim Quinlan <james.quinlan@broadcom.com> | 2024-08-15 18:57:22 -0400 |
|---|---|---|
| committer | Krzysztof Wilczyński <kwilczynski@kernel.org> | 2024-09-04 13:59:28 +0000 |
| commit | e1c88956e200e225f2712de4b5e2be923cf559fc (patch) | |
| tree | c7e4a8b896dc725afc59dee4e5de653fe02f3b53 /drivers/pci/controller/dwc/pcie-qcom-ep.c | |
| parent | 0d8046037610dcf9e59ece73bf4bbcec1e6a878b (diff) | |
PCI: brcmstb: Don't conflate the reset rescal with PHY ctrl
Add a "has_phy" field indicating that the internal PHY has SW control
that requires configuration. Some previous chips only required the
firing of the "rescal" reset controller.
This change requires us to give the 7216 SoC its own cfg_data structure.
Link: https://lore.kernel.org/linux-pci/20240815225731.40276-10-james.quinlan@broadcom.com
Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
[kwilczynski: commit log]
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Tested-by: Florian Fainelli <florian.fainelli@broadcom.com>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Stanimir Varbanov <svarbanov@suse.de>
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-qcom-ep.c')
0 files changed, 0 insertions, 0 deletions