Merge branch 'pci/dt-bindings'

- Add "apb", "sys", "pmc", "msg", "err" for Endpoint descriptions as well
  as for Root Complexes (Niklas Cassel)

- Add "tx_inta", "tx_intb", "tx_intc", "tx_intd" for interrupt signals
  triggered in response to PCIe Assert_INTx messages (Niklas Cassel)

- Refactor rockchip-dw-pcie binding to move generic properties to a new
  rockchip-dw-pcie-common binding that can be shared by both RC and EP mode
  (Niklas Cassel)

- Fix rockchip-dw-pcie description of INTx signals (Niklas Cassel)

- Add rockchip-dw-pcie description of Endpoint controller (Niklas Cassel)

- Avoid xilinx-versal-cpm overlapping of bridge registers and 32-bit BAR
  addresses (Thippeswamy Havalige)

- Add qcom Operating Performance Points (OPP) table (Krishna chaitanya
  chundru)

- Add a picture of mediatek,mt7621-pcie topology (Sergio Paracuellos)

- Add a generic "ats-supported" property so the OS can discover whether a
  Root Complex supports ATS (Jean-Philippe Brucker)

- Make the qcom,pcie-x1e80100 MHI register region mandatory (Abel Vesa)

* pci/dt-bindings:
  dt-bindings: PCI: qcom: x1e80100: Make the MHI reg region mandatory
  dt-bindings: PCI: generic: Add ats-supported property
  dt-bindings: PCI: mediatek,mt7621-pcie: Add PCIe host topology ASCII graph
  dt-bindings: PCI: qcom: Add OPP table
  dt-bindings: PCI: xilinx-cpm: Fix overlapping of bridge register and 32-bit BAR addresses
  dt-bindings: PCI: rockchip: Add DesignWare based PCIe Endpoint controller
  dt-bindings: PCI: rockchip-dw-pcie: Fix description of legacy IRQ
  dt-bindings: PCI: rockchip-dw-pcie: Prepare for Endpoint mode support
  dt-bindings: PCI: snps,dw-pcie-ep: Add tx_int{a,b,c,d} legacy IRQs
  dt-bindings: PCI: snps,dw-pcie-ep: Add vendor specific interrupt-names
  dt-bindings: PCI: snps,dw-pcie-ep: Add vendor specific reg-name

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