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| author | Bjorn Helgaas <bhelgaas@google.com> | 2023-08-29 11:03:53 -0500 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2023-08-29 11:03:53 -0500 |
| commit | 26d74926186200e0d900cf379327deafed92f9e9 (patch) | |
| tree | bb71246a9c4c317c7ea11098b75511589906474e /drivers/pci/controller/dwc/pcie-qcom-ep.c | |
| parent | aa5a239c5fcdf4de17701455be3eb116f052ba65 (diff) | |
| parent | bac406c34fbc906f09479af72cb6a908a5d1db1d (diff) | |
Merge branch 'pci/controller/microchip'
- Fix DED and SEC interrupt bit offsets so interrupt handlers work
correctly (Daire McNamara)
- Make driver buildable as a module (Daire McNamara)
- Reorganize register #defines to align with hardware docs (Daire McNamara)
- Tweak register accessors to simplify callers (Daire McNamara)
- Refactor interrupt initialisation (Daire McNamara)
- Read FPGA MSI configuration parameters from hardware instead of
hard-coding them (Daire McNamara)
- Re-partition code between probe() and init() (Daire McNamara)
* pci/controller/microchip:
PCI: microchip: Re-partition code between probe() and init()
PCI: microchip: Gather MSI information from hardware config registers
PCI: microchip: Clean up initialisation of interrupts
PCI: microchip: Enable event handlers to access bridge and control pointers
PCI: microchip: Align register, offset, and mask names with HW docs
PCI: microchip: Enable building driver as a module
PCI: microchip: Correct the DED and SEC interrupt bit offsets
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-qcom-ep.c')
0 files changed, 0 insertions, 0 deletions